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Jiahui Zhuo

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Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS)

© 2026 - PHINDER Consortium. Funded by the European Union under Grant Agreement No. 101258353. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the European Innovation Council and SMEs Executive Agency (EISMEA). Neither the European Union nor EISMEA can be held responsible for them.

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